PCB solution design is not finished the moment the routing closes. These eight disciplines cover every point where a real decision has to be made between the schematic and the files a fab can build.
PCB solution design is not finished the moment the routing closes. These eight disciplines cover every point where a real decision has to be made between the schematic and the files a fab can build.
Scope follows the actual constraints of your project. The table below lists what we routinely take on.
Break the requirements into modules, then turn those modules into a drawing you can review and build.
Stackup is not something you settle after routing. It decides whether what you planned can physically work.
Almost every high-speed problem traces back to the reference plane and the return path.
When the board has to get smaller and denser, the vias become the problem.
In the RF area, every trace and every ground shape exists for a reason.
The part that bends and the part that does not follow completely different rules.
Supply problems are invisible on the board, then show up all at once on power-up.
A problem found after the prototype arrives is the most expensive kind.
Common scope below. Whether your specific stackup, process window and mechanical constraints work is decided during assessment — send us the requirement first.
| Item | What this typically covers | What we do on the design side |
|---|---|---|
| Layer count and stackup | Single / double / multilayer, including blind-buried HDI and rigid-flex | Stackup planned around signal types and matched to fab capability |
| Impedance control | Consistent single-ended and differential targets | Calculated from stackup and material, with a verification sheet issued |
| High-speed interfaces | DDR / PCIe / USB / Ethernet / SerDes | Constraint-driven routing with length matching and topology |
| HDI process | Blind, buried, any-layer interconnect, via-in-pad | Via stack orders matched to the fab's process window |
| RF and mixed-signal | Low-loss laminates, tuned lines, analogue-digital partitioning | Antenna keep-out, feed lines and ground isolation planned together |
| Rigid-flex | Bend radius, dynamic flex zones, lamination structure | Components and vias constrained by process limits in the flex area |
| Power design | PDN modelling, decoupling, high-current paths | Sized for temperature rise across copper weight and parallel runs, with thermal analysis |
| Verification | DRC, DFM, impedance checks, SI / PI and thermal simulation | Cleared item by item; the reports ship with the release |
| Deliverables | Production data, assembly data, design sources, verification reports | Released to the fab's format; source files transferred |
| EDA platforms | Chosen to match your conventions and libraries | No forced format conversion |
All of these are fine. We work in whichever platform your conventions and libraries already live in — no forced conversion.
| Platform | Typical use |
|---|---|
| Altium Designer | Full enterprise flow, strong on high density and 3D collaboration |
| Cadence Allegro | Complex multilayer, high-density interconnect and constraint-driven routing |
| Cadence OrCAD Capture | Schematic and PCB together, suits mid-complexity work |
| PADS | Industrial suite with DFM/DFT checks and component libraries |
| Xpedition | Electrical and mechanical co-design |
| KiCad | Open-source option for cost-sensitive work and prototyping |
| EAGLE / Protus | Prototype validation and fast small-batch builds |
| Assembly and fab tooling | Stencil, pick-and-place, panelisation and impedance sheet generation |
Source files are delivered in the version you use; production data is released to your fab's format. If your fab has specific requirements — drill format, panelisation, impedance test coupons — send their spec along and we release to it.
Design rules are set by IPC standards and your fab's process capability together — not by copying a default rule set.
No need to talk price up front. Describe the product and its constraints, and we reply with feasibility and a recommended approach.